With the continued emphasis on highly integrated electronic devices, there is an ongoing need for semiconductor memory devices that operate at higher speeds and lower power and that have increased device density. Flash devices are the best match to meet these requirements because flash devices provide a large memory capacity without the need for a periodic refresh operation. As scaling progresses, reduced power consumption may be anticipated. Recently, devices with aggressive scaling and multiple-layered devices with transistor cells arranged in horizontal and vertical arrays have been under development.
Flash device, which have become well-known as a form of electrically erasable programmable read only memory, comprise one or more memory cell arrays. A memory cell array, in turn, is comprised of a plurality of memory blocks, each block is connected to a plurality of bit lines of the device. Each bit line is configured to connect to one or more memory cell strings where transistor stacks comprising charge storage layers, such as floating gates or charge trap layers, are arranged in series. A plurality of word lines run in a perpendicular direction relative tot the bit lines and connect to control gates over each of the charge storage layers.
In contemporary non-volatile memory devices, programming operations are performed by applying a programming voltage Vpgm to a word line of a memory cell to be programmed, while a pass voltage Vpass is applied to word lines of unselected cells of the string. At the same time, a ground voltage 0V is applied to a bit line of the cell string including the memory cell to be programmed, while a power voltage Vcc is applied to other bit lines corresponding to cell strings not including the memory cells to be programmed. In order to ensure a precise programming operation, the threshold voltage of the memory cell to be programmed, i.e. the “selected memory cell”, should be raised while the threshold voltages of unselected memory cells should not change.
The programming voltage Vpgm is generally a very high voltage, such as 20V, even though the effort to lower the level of the programming voltage has been made. Such a voltage level is strong enough to cause injection of electrons into the charge storage layer of the memory cell to be programmed. The electron injection is a result of the electric field generated between the control gate of the memory cell to be programmed to which the programming voltage Vpgm is applied, and the channel region of the memory cell to be programmed to which the ground voltage 0V is applied via the bit line. The resulting injection of electrons into the charge storage layer of the desired memory cell operates to program the memory cell.
In contemporary devices, the programming voltage is applied not only to the selected memory cell but also to unselected memory cells connected to the selected word line. As a result, unselected memory cells connected to the selected word line may be inadvertently programmed. Such unwanted programming in the unselected memory cells connected to the selected word line is referred to as a “program disturb.”